The FPGA-based Goldfish is still in constant flux. I decided it needed more encoders on the frontpanel, AND some visual feedback for the value of each of the encoders. Each encoder now has 16 LEDs around it to show the current value/meaning.
Apparently there are some suppliers that build complete rings (like Top-Up ), but I want to build my own rings first.
To build these rings, I wrote a small .NET tool to generate the scripts for Eagle. (If somebody has use for this or something like it, let us know on Twitter – I think it is too small/dirty to warrant its own github project – and it has been done before by others too)
The final puzzle to solve before the board can be routed and fabricated is the various ways I want the chips to talk to each other.
The interface board can be used as a standalone Arduino Mega (with TFT, touch and encoders) – using serial + reset to use the Arduino bootloader
The Freescale Kinetis K20 chip can upload new firmwares using this bootloader
The K20 usb-dfu bootloader is already in place and can be extended to allow passthrough to the FPGA and the Atmega
Now.. the UI board needs to talk to either the fpga or the mk20 based on the final firmware.. and the K20 might need to send commands to the video interface on the FPGA.. or on the UI board.. and the FPGA could send stuff to the audio codec… but the current goldfish code runs fine on the K20… so an optional bridge between the audio codec and the K20 might be handy to have as well… CHOICES!! if I can cleanly upgrade the K20 to a K22, the extra FPU performance will definately warrant codec-connection to that chip…
I’ll be back in the basement trying to decide what will happen. Building an open experimentation platform is all about enabling possibilities. But at some point I shall have to make concessions even before the first experiment.
To be continued!
After playing with the FPGA boards for a while, I decided to completely overhaul the Goldfish board.
Spending a bit more time and money will make this box much more useful for the coming years of audiovisual experiments!
The current preliminary hardware feature set:
Spartan 6 LX9 FPGA
Freescale MK20 (or MK22) ARM Cortex M4 MCU
2 small 320×240 tft screens with AVR for touch handling (1 screen for the FPGA, 1 for the MK20)
4 to 6 encoders (no more buttons, the encoders also have a button if I need something pressed down 🙂 )
2 microsd slots (again one for each)
Wolfson audio codec with headphone, lineout and linein connected
VGA and HDMI output for the FPGA
USB Host port
USB Client port
This all shall fit nicely sandwiched between 2 15x10cm PCBs
Progress so far:
The happy Australian is at it again!
This time, he talks about designing boards with FPGAs and explains various things about using tiny BGA (ball grid array) chips. These 3x3mm FPGAs have 36 connector-balls underneath, spaced only 0.4mm apart. Making circuit boards for these chips is still a bit too intricate for most cheap factories, but when you consider how much smaller the final boards can be – maybe using a more expensive factory evens out after all!
In the past few weeks, Stijn and Krzysztof have been playing with FPGA chips.
Progress has been made!
Stijn has created a servicable text-mode VGA setup:
Eventually, a component like this will be used for quick debugging of FPGA internals and/or GUI’s for the upcoming FPGA-hosting Goldfish device. For now it provides some fancy glitch visuals by twiddling with some on-board switches.
Krzysztof has added support for the WS2812b RGB LEDs to the FPGA code repository:
WS2812b RGB LEDs are extremely convenient to add some colour to your projects. Each LED comes with a built in controller and you can chain any number of them together.
You can find the WS2812b VHDL code at the github repo here. The VGA code will be added once it is a bit more complete.
Krzysztof Foltman has posted his FPGA efforts so far on GitHub!
Currently the codebase contains modules to deal with:
– key-matrix input
– LED output with brightness control
– Serial port input and output
– SPI flash
– Quad-SPI flash (4 times as fast as regular SPI)
No doubt this will grow fast.
See here: https://github.com/ThisIsNotRocketScience/fpgastuff
The code has been tested on a Cyclone IV FPGA.